Accelerating deep learning in the post-Moore’s era of computing

Scope

The dissertation asks how deep-learning systems can continue to become faster as transistor scaling slows and memory movement increasingly limits performance.

Abstract

It develops two complementary paths for post-Moore acceleration: reducing the computation required by deep-learning workloads without sacrificing accuracy, and improving how effectively accelerator hardware uses its available resources. The work connects algorithms, data representations, and architecture to deliver performance gains with minimal area and power overhead.